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泰瑞达(teradyne)2010测试研讨会
2010-11-19 转载请注明出处 http://www.ictest8.com

　　　

Abstracts

USB 3.0 Testing Requirements and Solution:
The Super-Speed Universal Serial Bus (USB 3.0 rev 1.0) is the latest release of the high speed consumer serial interface for PCs, storage peripherals, cameras, flash memory and many other consumer applications. At a data rate of 4800Mbps, USB 3.0 leverages the physical layer technology of PCI Express and SATA in a lower cost, backward compatible format. This presentation will review the technology and challenges of USB 3.0 and how to use the Ultra FLEX test instrument suite to test these emerging devices. The seminar will also review of the “Electrical Compliance Test Specification, SuperSpeed Universal Serial Bus.”

Wafer Level Chip Scale Packaging RF Testing Challenge:


Testing Wafer Level Chip Scale RF Packages can be a real hurdle for any test system. In addition to the challenges of RF, testing many devices in parallel to meet economic goals for cost of test can add another layer of complexity. In this seminar, you will see how Teradyne’s Ultra FLEX test system with the UltraWave12G architecture, ESA toolkit and PIB design capability can make light work of this emerging challenge.

Planning for Concurrent Test Implementation:
Concurrent Test (CT) is one of the most important new test methodologies being addressed today for significant cost-of-test reduction in complex devices. This is enabled by multi-core SoC and SiP device designs required by the end market. These designs can drive significantly large test times due to the increased device content. Maximizing multisite testing is still the standard first piece of test cost reduction, however Concurrent Test is fast becoming the new standard to support the next level of cost savings.
Planning is the critical first step to achieve a successful Concurrent Test implementation that maximizes the concurrent efficiency supported by the device design. A logical methodology will be presented, along with a software tool to help the planning process so errors can be avoided and optimal concurrency can be achieved.
Eagle Test Systems Business Unit Product Overview
This section will summarize the Eagle product family, market segment coverage, and system features, including some of the latest introductions to including:
ETS-88 Multi Sector software technology (MST)
Dual Audio Analyzer Unit for testing studio quality audio (DAAU)
SPU112 Smart Pin
Other overview topics included are:
Floating Resource review
Op Amp Overview
Discrete Overview

LED Driver Testing
LED products are taking the market place by storm. Technology advancements in white LEDs enable them to be used in a variety of applications including back lighting, industrial lighting, display technology and others. To drive LEDs, many new LED driver control integrated circuits (ICs) are being developed. When testing LED driver control ICs, many fast and accurate current measurements are required. The Eagle Test System offers very accurate current measurements on its standard Analog pins and provides a new and unique way to make these measurements faster by using programmable pattern sequencers available to the user. This coupled with some advanced switching methods make for very fast test times.
Sub-pico Farad Capacitance Testing
The continued increase for higher bandwidth performance in devices means a continued requirement to decrease capacitance. In order for semiconductor manufactures to guarantee functionality when devices are used in high bandwidth applications, capacitance becomes an important factor to measure. In this presentation the Eagle Test Systems Capacitance Application Module (CAM) will be introduced and shown how it can be used to test a whole host of devices in the sub-pico farad range. It will also cover the unique abilities of the CAM to compensate or minimize stray cable or printed circuit board trace capacitance.

Embedded 14 Bit ADC testing
Analog to Digital Converters are becoming increasingly integrated into many of today’s integrated circuits. Devices such as antilock brake ASICs, battery gas gauges and digital DC-DC converters all incorporate embedded ADC’s in their designs. Testing integral and differential non-linearity (INL & DNL) usually requires a very accurate instrument to generate steady low noise ramps for implementing histogram test techniques. The presentation will show how standard instrumentation and a very small amount of applications components can a unique solution for addressing these challenges.

Invitation letter SH 2010.ppt
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